5-6

FAST AND LS TTL DATA

SN54/74LS192

• SN54/74LS193

Sb l

P

Limits

Ui

T

C

di i

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

tW

Any Pulse Width

20

ns

V5 0 V

ts

Data Setup Time

20

ns

VCC =5 0V

th

Data Hold Time

5.0

ns

VCC = 5.0 V

trec

Recovery Time

40

ns

DEFINITIONS OF TERMS

SETUP TIME (ts) is defined as the minimum time required for

the correct logic level to be present at the logic input prior to the

PL transition from LOW-to-HIGH in order to be recognized and

transferred to the outputs.

HOLD TIME (th) is defined as the minimum time following the

PL transition from LOW-to-HIGH that the logic level must be

maintained at the input in order to ensure continued recogni-

tion. A negative HOLD TIME indicates that the correct logic

level may be released prior to the PL transition from

LOW-to-HIGH and still be recognized.

RECOVERY TIME (trec) is defined as the minimum time

required between the end of the reset pulse and the clock

transition from LOW-to-HIGH in order to recognize and

transfer HIGH data to the Q outputs.