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LT3752 bảng dữ liệu(PDF) 29 Page - Analog Devices

tên linh kiện LT3752
Giải thích chi tiết về linh kiện  Active Clamp Synchronous Forward Controllers with Internal Housekeeping Controller
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LT3752 bảng dữ liệu(HTML) 29 Page - Analog Devices

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LT3752/LT3752-1
29
Rev. C
For more information www.analog.com
APPLICATIONS INFORMATION
stops immediately and the SS1/SS2 pins are rapidly
discharged. The absence of switching reduces the sense
voltage at the OC pin, allowing SS1/SS2 pins to recharge
and eventually attempt switching again. The part exists
in this hiccup mode as long as the overcurrent condition
exists. This protects the converter and reduces power
dissipation in the components (see Hard Stop in the
Applications Information section). The 96mV peak switch
current threshold is independent of the voltage drop in
RISLP used for slope compensation.
Output DC load current to trigger hiccup mode:
LOAD(OVERCURRENT)
=
NP
NS
•
96mV
RISENSE

 – 1/2 IRIPPLE(P-P)
(
)
where:
NP = forward transformer primary turns
NS = forward transformer secondary turns
IRIPPLE(P-P) = Output inductor peak-to-peak ripple
current
RISENSEshouldbeprogrammedtoallowmaximumDCload
current for the application plus enough margin during load
transients to avoid overcurrent hiccup mode.
Programming Maximum Duty Cycle Clamp: DVSEC
(Volt-Second Clamp)
Unlike other converters which only provide a fixed maxi-
mum duty cycle clamp, the LT3752/LT3752-1 provide an
accurate programmable maximum duty cycle clamp
(DVSEC) on the OUT pin which moves inversely with
system input. DVSEC provides a duty cycle guardrail to
limit the volt-seconds-on product over the entire natural
duty cycle range (Figures 11 and 12). This limits the
drain voltage required for complete transformer reset.
A resistor RIVSEC from the IVSEC pin to analog ground
(Pin 18) programs DVSEC.
DVSEC (OUT pin duty cycle clamp)
= 0.725 •
RIVSEC
51.1k
•
fOSC
300
•
1.25
UVLO_VSEC
where:
RIVSEC = programming resistor at IVSEC pin
fOSC = switching frequency (kHz)
UVLO_VSEC = resistor divided system input voltage
RIVSEC can program any DVSEC required at minimum
system input. DVSEC will then follow natural duty cycle
as VIN varies. Maximum programmable DVSEC is typi-
Figure 11. Volt-Second (DVSEC) Clamp
3752 F12
R1
R2
UVLO_VSEC
TO
OVLO
PIN
R3
RIVSEC
SYSTEM
INPUT
LT3752/LT3752-1
IVSEC
RT
RT
Figure 12. Programming DVSEC
tON_VSEC
tON
OUT
t
D = tON/t
3752 F11
(PROGRAMMED
BY RIVSEC)
DVSEC = tON_VSEC/t
DVSEC = “DUTY CYCLE GUARDRAIL”



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