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ADP1032ACPZ-5-R7 bảng dữ liệu(PDF) 23 Page - Analog Devices

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ADP1032ACPZ-5-R7 bảng dữ liệu(HTML) 23 Page - Analog Devices

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Data Sheet
ADP1032
Rev. 0 | Page 23 of 37
THEORY OF OPERATION
The ADP1032 is a high performance, isolated micro PMU that
combines an isolated flyback regulator and a buck regulator,
providing two isolated power rails. Additionally, the ADP1032
includes seven low power digital isolators in a 41-lead LFCSP
package for channel to channel isolated applications where
power dissipation and board space are at a premium.
VOUT1
VOUT2
MVDD
C1
SVDD2
VINP
SW2
FB1
VOUT1
VOUT2
SYNC
PGNDP
VINP
SLEW
PWRGD
SWP
L1
CIN
CFLYBK
CBUCK
GNDP
SGND1
MVDD
MGPO3
SGPI3
MGPI2
MGPI1
SGPO2
SGPO1
MGND
Tx1
SVDD1
SVDD2
D1
RFT1
RFB1
C3
C4
SVDD1
EN
PWRGD
PG1
PG2
R6
R5
1:1
FEEDBACK
AND
OVER VOLTAGE
CONTROL
FLYBACK
CONTROLLER
PLL
÷2
HIGH
EFFICIENCY
BUCK
MGND
DECODE
ENCODE
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
MSS
MCK
MO
MI
SSS
SCK
SI
SO
CONTROL
BLOCK
CONTROL
BLOCK
SGND2
÷2
NOTES
1. CFLYBK IS THE FLYBACK REGULATOR OUTPUT CAPACITOR VALUE.
2. CBUCK IS THE BUCK REGULATOR OUTPUT CAPACITOR VALUE.
Figure 66. Simplified Block Diagram



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