PCF8564A datasheet(16/65 Pages) NXP

16 / 65 page

PCF85063A

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Product data sheet

Rev. 7 — 30 March 2018

16 of 65

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

– the countdown timer runs in a repetitive loop and keeps generating timed periods

• When TI_TP is set logic 0

– the INT generation follows the TF flag

– TF stays set until it is cleared

– If TF is not cleared before the next coming interrupt, no INT is generated

– the countdown timer stops after the first countdown

8.2.2.4

COF[2:0]: Clock output frequency

A programmable square wave is available at pin CLKOUT. Operation is controlled by the

COF[2:0] bits in the register Control_2. Frequencies of 32.768 kHz (default) down to 1 Hz

can be generated for use as a system clock, microcontroller clock, input to a charge

pump, or for calibration of the oscillator.

Pin CLKOUT is a push-pull output and enabled at power-on. CLKOUT can be disabled by

setting COF[2:0] to 111 or by setting CLKOE LOW (PCF85063ATL only). When disabled,

the CLKOUT is LOW. If CLKOE is HIGH and COF[2:0]=111 there will be no clock and

CLKOUT will be LOW.

The duty cycle of the selected clock is not controlled. However, due to the nature of the

clock generation, all clock frequencies except 32.768 kHz have a duty cycle of 50 : 50.

The STOP bit function can also affect the CLKOUT signal, depending on the selected

frequency. When the STOP bit is set logic 1, the CLKOUT pin generates a continuous

LOW for those frequencies that can be stopped. For more details of the STOP bit function,

see Section 8.2.1.2.

[1]

Duty cycle definition: % HIGH-level time : % LOW-level time.

[2]

Default values: The duty cycle of the CLKOUT when outputting 32,768 Hz could change from 60:40 to

40:60 depending on the detector since the 32,768 Hz is derived from the oscillator output which is not

perfect. It could change from device to device and it depends on the silicon diffusion. There is nothing that

can be done from outside the chip to influence the duty cycle.

[3]

1 Hz clock pulses are affected by offset correction pulses.

Table 11.

CLKOUT frequency selection

COF[2:0]

CLKOUT frequency (Hz) Typical duty cycle[1]

Effect of STOP bit

000[2]

32768

60 : 40 to 40 : 60

no effect

001

16384

50 : 50

no effect

010

8192

50 : 50

no effect

011

4096

50 : 50

CLKOUT = LOW

100

2048

50 : 50

CLKOUT = LOW

101

1024

50 : 50

CLKOUT = LOW

110

1[3]

50 : 50

CLKOUT = LOW

111

CLKOUT = LOW

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