WIZ610io User Manual (WIZnet Co.,Ltd.)

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control the flow of data on the SPI bus. The W6100 operates as SPI Slave device

and supports the most common modes - SPI Mode 0 and 3.

The only difference between SPI Mode 0 and 3 is the polarity of the SCLK signal

at the inactive state. With SPI Mode 0 and 3, data is always latched in on the

rising edge of SCLK and always output on the falling edge of SCLK.

3.1 Process of using general SPI Master device

1. Configure Input/Output direction on SPI Master Device pins.

2. Configure SCSn as ‘High’ on inactive

3. Write target address for transmission on SPDR register (SPI Data Register).

4. Write Control Byte for transmission on SPDR register.

5. Write desired data for transmission on SPDR register.

6. Configure SCSn as ‘Low’ (data transfer start)

7. Wait for reception complete

8. If all data transmission ends, configure SCSn as ‘High’

< W6100 SPI Frame Format >

3.2 Read processing