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TLC555CD bảng dữ liệu(PDF) 21 Page - Texas Instruments |
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TLC555CD bảng dữ liệu(HTML) 21 Page - Texas Instruments |
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21 / 42 page ![]() THRES GND C RA VDD (5 V to 15 V) Output DISCH OUT VDD RESET TRIG CONT Modulation Input (see Note A) Clock Input 4 8 3 7 6 2 5 1 Time − 0.1 ms/div Capacitor Voltage Output Voltage Input Voltage 21 TLC555 www.ti.com SLFS043I – SEPTEMBER 1983 – REVISED JULY 2019 Product Folder Links: TLC555 Submit Documentation Feedback Copyright © 1983–2019, Texas Instruments Incorporated Typical Applications (continued) 8.2.1.3 Application Curve VDD = 5 V RA = 1 kΩ C = 0.1 µF See Figure 18 Figure 19. Timing Waveforms for Missing-Pulse Detector 8.2.2 Pulse-Width Modulation The operation of the timer can be modified by modulating the internal threshold and trigger voltages, which is accomplished by applying an external voltage (or current) to CONT. Figure 20 shows a circuit for pulse-width modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the threshold voltage. Figure 21 shows the resulting duty cycle versus control voltage transfer function. Attempting to run under 10% duty cycle could result in inconsistent output pulses. Attempting to run close to 100% duty cycle will result in frequency division by 2, then 3, then 4. A. The modulating signal can be direct or capacitively coupled to CONT. For direct coupling, consider the effects of modulation source voltage and impedance on the bias of the timer. Figure 20. Circuit for Pulse-Width Modulation |
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