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PMS234 bảng dữ liệu(PDF) 4 Page - PADAUK Technology. |
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PMS234 bảng dữ liệu(HTML) 4 Page - PADAUK Technology. |
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4 / 107 page ![]() PMC234/PMS234 Series 12-bit ADC Enhanced FPPA TM 8-bit Controller ©Copyright 2018, PADAUK Technology Co. Ltd Page 4 of 107 PDK-DS-PMX234_V103 – Dec. 19, 2018 5-3. Program Structure ...............................................................................................................35 5-3-1. Program structure of two FPP units mode................................................................35 5-3-2. Program structure of single FPP mode.....................................................................35 5-4. Boot Procedure....................................................................................................................36 5-5. Data Memory -- SRAM.........................................................................................................37 5-6. Arithmetic and Logic Unit .....................................................................................................37 5-7. Oscillator and clock..............................................................................................................38 5-7-1. Internal High RC oscillator and Internal Low RC oscillator........................................38 5-7-2. Chip calibration ........................................................................................................38 5-7-3. IHRC Frequency Calibration and System Clock .......................................................38 5-7-4. External Crystal Oscillator ........................................................................................40 5-7-5. System Clock and LVR level ....................................................................................41 5-7-6. System Clock Switching ...........................................................................................42 5-8. 16-bit Timer (Timer16) .........................................................................................................43 5-9. 8-bit Timer (Timer2) with PWM generation...........................................................................45 5-9-1. Using the Timer2 to generate periodical waveform ..................................................46 5-9-2. Using the Timer2 to generate 8-bit PWM waveform .................................................48 5-9-3. Using the Timer2 to generate 6-bit PWM waveform .................................................49 5-10. WatchDog Timer................................................................................................................50 5-11. Interrupt .............................................................................................................................51 5-12. Power-Save and Power-Down ...........................................................................................53 5-12-1. Power-Save mode (“stopexe”) ...............................................................................53 5-12-2. Power-Down mode (“stopsys”) ...............................................................................54 5-12-3. Wake-up ................................................................................................................55 5-13. IO Pins...............................................................................................................................56 5-14. Reset and LVR ..................................................................................................................57 5-14-1. Reset .....................................................................................................................57 5-14-2. LVR (low voltage reset)..........................................................................................57 5-15. Comparator........................................................................................................................58 5-15-1. Comparator Hardware Diagram .............................................................................58 5-15-2. Analog Inputs .........................................................................................................59 5-15-3. Internal reference voltage (Vinternal R) .......................................................................60 5-15-4. Comparator Interrupt Operation .............................................................................62 5-15-5. Synchronizing Comparator Output to Timer2 .........................................................62 5-15-6. Comparator Response Time ..................................................................................62 5-15-7. Using the comparator.............................................................................................63 5-15-8. Using the comparator and band-gap 1.20V ............................................................64 5-16. LCD Bias Voltage Generator..............................................................................................65 5-17. Analog-to-Digital Conversion (ADC) module ......................................................................66 |
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