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ASPM34 bảng dữ liệu(PDF) 10 Page - ON Semiconductor |
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ASPM34 bảng dữ liệu(HTML) 10 Page - ON Semiconductor |
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10 / 16 page ![]() NFVA25012NP2T www.onsemi.com 10 Figure 8. Mounting Screws Torque Order NOTES: 12.Do not over torque when mounting screws. Too much mounting torque may cause DBC cracks, as well as bolts and Al heat−sink destruction. 13.Avoid one−sided tightening stress. Figure 8 shows the recommended torque order for the mounting screws. Uneven mounting can cause the DBC substrate of package to be damaged. The pre−screwing torque is set to 20~30% of maximum torque rating. Pre − Screwing: 1 → 2 Final Screwing: 2 → 1 1 2 TIME CHARTS OF SPMs PROTECTIVE FUNCTION Figure 9. Under-Voltage Protection (Low-Side) a1: Control supply voltage rises: after the voltage rises UVDDR, the circuits start to operate when the next input is applied. a2: Normal operation: IGBT ON and carrying current. a3: Under-voltage detection (UVDDD). a4: IGBT OFF in spite of control input condition. a5: Fault output operation starts with a fixed pulse width according to the condition of the external capacitor CFOD. a6: Under-voltage reset (UVDDR). a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Input Signal Output Current Fault Output Signal Control Supply Voltage RESET UV Protection Circuit State SET RESET a1 a3 a2 a4 a6 a5 a7 DDR UVDDD |
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