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ASM2I99448 bảng dữ liệu(PDF) 5 Page - Alliance Semiconductor Corporation

tên linh kiện ASM2I99448
Giải thích chi tiết về linh kiện  3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
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May 2005
ASM2I99448
rev 0.3
3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
5 of 15
Notice: The information in this document is subject to change without notice.
Table 6. AC CHARACTERISTICS (V
CC = 3.3V ± 5%, TA = –40°C to +85°C)
1
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fref
Input Frequency
0
350
MHz
fMAX
Maximum Output Frequency
0
350
MHz
VPP
Peak-to-peak input voltage
PCLK
400
1000
mV
LVPECL
VCMR
2
Common Mode Range
PCLK
1.3
VCC-0.8
V
LVPECL
tP, REF
Reference Input Pulse Width
1.4
nS
tr, tf
CCLK Input Rise/Fall Time
1.0
3
nS
0.8 to 2.0V
tPLH/HL
tPLH/HL
Propagation delay
PCLK to any Q
CCLK to any Q
1.6
1.3
3.6
3.3
nS
nS
tPLZ, HZ
Output Disable Time
11
nS
tPZL, LZ
Output Enable Time
11
nS
tS
Setup time
CCLK to CLK_STOP
PCLK to CLK_STOP
0.0
0.0
nS
nS
tH
Hold time
CCLK to CLK_STOP
PCLK to CLK_STOP
1.0
1.5
nS
nS
tsk(O)
Output-to-output Skew
150
pS
tsk(PP)
Device-to-device Skew
PCLK or CCLK to any Q
2.0
nS
tSK(P)
DCQ
Output pulse skew
4
Output Duty Cycle
Using CCLK
Using PCLK
fQ<170 MHz
45
50
300
400
55
pS
pS
%
DCREF = 50%
tr, tf
Output Rise/Fall Time
0.1
1.0
nS
0.55 to 2.4V
Note: 1. AC characteristics apply for parallel output termination of 50Ω to VTT.
2. VCMR (AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the VCMR range and the input
swing lies within the VPP (AC) specification. Violation of VCMR or VPP impacts tPLH/HL and tSK(PP).
3. Violation of the 1.0 nS maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input pulse
width, output duty cycle and maximum frequency specifications.
4. Output pulse skew is the absolute difference of the propagation delay times: | tpLH - tpHL |.
Table 7. DC CHARACTERISTICS (V
CC = 2.5V ± 5%, TA = –40°C to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
Input high voltage
1.7
VCC + 0.3
V
LVCMOS
VIL
Input low voltage
-0.3
0.7
V
LVCMOS
VPP
Peak-to-peak input voltage
PCLK
250
mV
LVPECL
VCMR
1
Common Mode Range
PCLK
1.0
VCC-0.7
V
LVPECL
IIN
Input current
2
300
µA
VIN=GND or
VIN=VCC
VOH
Output High Voltage
1.8
V
IOH= -15 mA
3
VOL
Output Low Voltage
0.6
V
IOL= 15 mA
3
ZOUT
Output impedance
19
Ω
ICCQ
4
Maximum Quiescent Supply Current
2.0
mA
All VCC Pins
Note: 1. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR
range and the input swing lies within the VPP (DC) specification.
2. Input pull-up / pull-down resistors influence input current.
3. The ASM2I99448 is capable of driving 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated
transmission line to a termination voltage of VTT. Alternatively, the device drives one 50Ω series terminated transmission lines at VCC=2.5V.
4. ICCQ is the DC current consumption of the device with all outputs open and the input in its default state or open.



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