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ASM2I9942P bảng dữ liệu(PDF) 6 Page - Alliance Semiconductor Corporation |
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ASM2I9942P bảng dữ liệu(HTML) 6 Page - Alliance Semiconductor Corporation |
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6 / 10 page ![]() May 2005 ASM2I9942P rev 0.3 Low Voltage 1:18 Clock Distribution Chip 6 of 10 Notice: The information in this document is subject to change without notice. TJ,MAX should be selected according to the MTBF system requirements and Table 8. Rthja can be derived from Table 9. The Rthja represent data based on 1S2P boards, using 2S2P boards will result in lower thermal impedance than indicated below. Table 9. Thermal package impedance of the 32LQFP Convection, LFPM Rthja (1P2S board), °C/W Rthja (2P2S board), °C/W Still air 86 61 100 lfpm 76 56 200 lfpm 71 54 300 lfpm 68 53 400 lfpm 66 52 500 lfpm 60 49 If the calculated maximum frequency is below 350 MHz, it becomes the upper clock speed limit for the given application conditions. The following eight derating charts describe the safe frequency operation range for the ASM2I9942P. The charts were calculated for a maximum tolerable die junction temperature of 110 °C (120°C), corresponding to an estimated MTBF of 9.1 years (4 years), a supply voltage of 3.3V and series terminated transmission line or capacitive loading. Depending on a given set of these operating conditions and the available device convection a decision on the maximum operating frequency can be made. |
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