RM48L540DPGET datasheet(93/174 Pages) TI

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RM48L940, RM48L740, RM48L540

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SPNS175C – APRIL 2012 – REVISED JUNE 2015

6.15 Vectored Interrupt Manager

The vectored interrupt manager (VIM) provides hardware assistance for prioritizing and controlling the

many interrupt sources present on this device. Interrupts are caused by events outside of the normal flow

of program execution. Normally, these events require a timely response from the central processing unit

(CPU); therefore, when an interrupt occurs, the CPU switches execution from the normal program flow to

an interrupt service routine (ISR).

6.15.1 VIM Features

The VIM module has the following features:

•

Supports 96 interrupt channels.

–

Provides programmable priority and enable for interrupt request lines.

•

Provides a direct hardware dispatch mechanism for fastest IRQ dispatch.

•

Provides two software dispatch mechanisms when the CPU VIC port is not used.

–

Index interrupt

–

•

Parity protected vector interrupt table

6.15.2 Interrupt Request Assignments

Table 6-31. Interrupt Request Assignments

DEFAULT VIM

MODULES

INTERRUPT SOURCES

INTERRUPT CHANNEL

ESM

ESM High level interrupt (NMI)

Reserved

RTI

RTI compare interrupt 0

RTI

RTI compare interrupt 1

RTI

RTI compare interrupt 2

RTI

RTI compare interrupt 3

RTI

RTI overflow interrupt 0

RTI

RTI overflow interrupt 1

RTI

RTI time base interrupt

GPIO

GPIO interrupt A

N2HET1

N2HET1 level 0 interrupt

HTU1

HTU1 level 0 interrupt

MIBSPI1

MIBSPI1 level 0 interrupt

LIN

LIN level 0 interrupt

MIBADC1

MIBADC1 event group interrupt

MIBADC1

MIBADC1 sw group 1 interrupt

DCAN1

DCAN1 level 0 interrupt

SPI2

SPI2 level 0 interrupt

Reserved

CRC

CRC Interrupt

ESM

ESM Low level interrupt

SYSTEM

Software interrupt (SSI)

CPU

PMU Interrupt

GPIO

GPIO interrupt B

N2HET1

N2HET1 level 1 interrupt

HTU1

HTU1 level 1 interrupt

System Information and Electrical Specifications

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