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IS25LP032A-DFLE bảng dữ liệu(PDF) 21 Page - Integrated Silicon Solution, Inc

tên linh kiện IS25LP032A-DFLE
Giải thích chi tiết về linh kiện  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  99 Pages
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nhà sản xuất  ISSI [Integrated Silicon Solution, Inc]
Trang chủ  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP032A-DFLE bảng dữ liệu(HTML) 21 Page - Integrated Silicon Solution, Inc

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IS25LP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
21
Rev. A
11/06/2015
7. PROTECTION MODE
The IS25LP064A/032A supports hardware and software write-protection mechanisms.
7.1 HARDWARE WRITE PROTECTION
The Write Protection (WP#) pin provides a hardware write protection method for BP3, BP2, BP1, BP0, SRWD,
and QE in the Status Register. Refer to the section 6.1 STATUS REGISTER.
Write inhibit voltage (VWI) is specified in the section 9.8 POWER-UP AND POWER-DOWN. All write sequence
will be ignored when Vcc drops to VWI.
Table 7.1 Hardware Write Protection on Status Register
SRWD
WP#
Status Register
0
Low
Writable
1
Low
Protected
0
High
Writable
1
High
Writable
Note: Before the execution of any program, erase or write Status/Function Register instruction, the Write Enable
Latch (WEL) bit must be enabled by executing a Write Enable (WREN) instruction. If the WEL bit is not
enabled, the program, erase or write register instruction will be ignored.
7.2 SOFTWARE WRITE PROTECTION
The IS25LP064A/032A also provides a software write protection feature. The Block Protection (TBS, BP3, BP2,
BP1, BP0) bits allow part or the whole memory area to be write-protected.



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