XRT79L71IB datasheet(69/441 Pages) EXAR

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PRELIMINARY

XRT79L71

1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

REV. P1.0.3

RECEIVE PAYLOAD DATA OUTPUT INTERFACE

RECEIVE PAYLOAD DATA OUTPUT INTERFACE - TIMING REQUIREMENTS

TABLE 13: TIMING INFORMATION FOR THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK

Test Conditions: TA = 25°C, VDD = 3.3V + 5% unless otherwise specified

SYMBOL

PARAMETER

MIN.TYP.MAX.UNITS

CONDITIONS

Receive Payload Data Output Interface Timing - Serial Mode Operation (See Figure 19)

t50

Rising edge of RxClk to Payload Data (RxSer) out-

put delay

DS3 Applications

E3 Applications

t51

Rising edge of RxClk to RxFrame output delay

DS3 Applications

E3 Applications

t52

Rising edge of RxClk to RxOHInd output delay.

DS3 Applications

E3 Applications

Receive Payload Data Output Interface Timing - Nibble Mode Operation (see Figure 20)

t53

Falling edge of RxClk to rising edge of RxFrame out-

put delay

2.1

t54

Falling edge of RxClk to rising edge of RxNib[3:0]

output delay

2ns

FIGURE 19. TIMING DIAGRAM FOR THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE (SERIAL MODE)

XRT79L71 Receive Payload Data I/F Signals

RxClk

RxSer

RxFrame

RxOHInd

Payload[4702]

Payload[4703]

X-Bit

Payload[0]

t50

t51

t52

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