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ESP32 bảng dữ liệu(PDF) 20 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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ESP32 bảng dữ liệu(HTML) 20 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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20 / 64 page ![]() 2. Pin Definitions Each strapping pin is connected to its internal pull-up/pull-down during the chip reset. Consequently, if a strapping pin is unconnected or the connected external circuit is high-impedance, the internal weak pull-up/pull-down will determine the default input level of the strapping pins. To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host MCU’s GPIOs to control the voltage level of these pins when powering on the chip. After reset release, the strapping pins work as normal-function pins. Refer to Table 3 for a detailed boot-mode configuration by strapping pins. Table 3: Strapping Pins Voltage of Internal LDO (VDD_SDIO) Pin Default 3.3 V 1.8 V MTDI Pull-down 0 1 Booting Mode Pin Default SPI Boot Download Boot GPIO0 Pull-up 1 0 GPIO2 Pull-down Don’t-care 0 Enabling/Disabling Debugging Log Print over U0TXD During Booting Pin Default U0TXD Active U0TXD Silent MTDO Pull-up 1 0 Timing of SDIO Slave Pin Default FE Sampling FE Output FE Sampling RE Output RE Sampling FE Output RE Sampling RE Output MTDO Pull-up 0 0 1 1 GPIO5 Pull-up 0 1 0 1 Note: • FE: falling-edge, RE: rising-edge. • Firmware can configure register bits to change the settings of “Voltage of Internal LDO (VDD_SDIO)” and “Timing of SDIO Slave”, after booting. • For ESP32 chips that contain an embedded flash, users need to note the logic level of MTDI. For example, ESP32- D2WD contains an embedded flash that operates at 1.8 V, therefore, the MTDI should be pulled high. ESP32- U4WDH contains an embedded flash that operates at 3.3 V, therefore, the MTDI should be low. The illustration below shows the setup and hold times for the strapping pin before and after the CHIP_PU signal goes high. Details about the parameters are listed in Table 4. Espressif Systems 13 Submit Documentation Feedback ESP32 Datasheet V3.4 |
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