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USB3317C bảng dữ liệu(PDF) 32 Page - SMSC Corporation

tên linh kiện USB3317C
Giải thích chi tiết về linh kiện  Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
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nhà sản xuất  SMSC [SMSC Corporation]
Trang chủ  http://www.smsc.com
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USB3317C bảng dữ liệu(HTML) 32 Page - SMSC Corporation

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Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
Revision 2.1 (06-02-10)
32
SMSC USB3317 REV C
DATASHEET
5.6.2.4
Vbus Pulsing with Pull-up and Pull-down Resistors
In addition to the internal Vbus comparators, the USB3317 also includes the integrated Vbus pull-up
and pull-down resistors used for Vbus Pulsing. To discharge the Vbus voltage so that a Session
Request can begin, the USB3317 provides a pull-down resistor from Vbus to Ground. This resistor is
controlled by the DischargeVbus bit 3 of the OTG Control register. The pull-up resistor is connected
between Vbus and VDD33. This resistor is used to pull Vbus above 2.1 volts so that the A-Device
knows that a USB session has been requested. The state of the pull-up resistor is controlled by the
bit 4 ChargeVbus of the OTG Control register. The Pull-Up and Pull-Down resistor values are detailed
in Table 4.7.
5.6.2.5
Vbus Input Impedance
The OTG Supplement requires an A-Device that supports Session Request Protocol to have a VBUS
input impedance less than 100kΩ and greater the 40kΩ to ground. The USB3317 provides a 75kΩ
resistance to ground, RVB. The RVB resistor tolerance is detailed in Table 4.7.
5.6.3
Driving External Vbus
A system that is operating as a host is required to source 5 volts on VBUS. The USB3317 fully
supports VBUS power control using external devices. The USB3317 provides an active high control
signal, CPEN, which is dedicated to controlling the Vbus supply when configured as an A-Device.
CPEN is asserted by setting the DrvVbus or DrvVbusExternal bit of the OTG Control register. To be
compatible with Link designs that support both internal and external Vbus supplies the DrvVbus and
DrvVbusExternal bits in the OTG Control Register are or’d together. This enables the Link to set either
bit to access the external Vbus enable (CPEN.) This logic is shown in Figure 5.9. DrvVbus and
DrvVbusExternal are set to 0 on POR.
Figure 5.9 USB3317 Drives External Vbus Supply or Switch
PHY
REFCLK
DM
DP
USB
Connector
D-
D+
VBUS
ID
ID
VBUS
12
ULPI Bus
SOC/FPGA/ASIC
REFCLK
ULPI Bus
DrvVbusExternal
DrvVbus
CPEN
VBUS
Supply
or Switch
EN
Out



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