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C2306 bảng dữ liệu(PDF) 3 Page - List of Unclassifed Manufacturers

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C2306 bảng dữ liệu(HTML) 3 Page - List of Unclassifed Manufacturers

  C2306 Datasheet HTML 1Page - List of Unclassifed Manufacturers C2306 Datasheet HTML 2Page - List of Unclassifed Manufacturers C2306 Datasheet HTML 3Page - List of Unclassifed Manufacturers C2306 Datasheet HTML 4Page - List of Unclassifed Manufacturers  
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C2306
Specifications Subject to Change Without Notice
C2306Spec Rev
5 12/30/9 9
Page 3
Recommended LO IN Port Matching
The LO IN port of the C2306 can be matched into 50 ohms with a lossy network. At 3dBm drive, the
unmatched port is at Z = 5 –15j ohms at 2.278 GHz. Also of note is that this impedance varies somewhat with
the LO drive level. Therefore a narrow band high Q network is not recommended due to inherent
manufacturing variation in LO drive available. The simple network below matches this port over an ~ 10%
bandwidth.
Test Board Layout
LO IN
Pin 2
C1
TRL 1
R1
LO Source
50 ohm
VDD
IF AMP
LO IN
RF IN
VDD
IF OUT
Material : GET EK
.028”
Biasing and Electrical Ground/
Thermal Considerations
Pins 3,4,5,10 and 12 should have ground vias straddling
both sides of the pin solder contact. This insures good
electrical and thermal grounding. If the IF AMP is run at
Idss (DC Grounded IF BIAS pin 14), this pin should be
grounded as described above. It is recommended that a
continuous ground plane be present under the package
to lower pin impedance and maintain similarity with the
matching environment used in the schematic in the
Application Information section. Bias for the IF amplifier
is supplied thru IF OUT pin 14. All ports are DC coupled
to the IC. Pins 2,6 and 13 should be kept at 0V DC to
maintain proper gate voltages. Pin 9 is internally biased
at 5V under normal operation and requires an external DC
block.
Part
Value/Type
Size
C1
1.8pF NPO
0603
R1
4.3
Ω
0603
TRL1
θ = 21°, Z
0=110
Ω
@2.5GHz



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