www.ti.com

TAS5186

SLES136 – MAY 2005

GENERAL INFORMATION (continued)

TERMINAL FUNCTIONS

TERMINAL

DESCRIPTION

NAME

NO.

AGND

12

P

Analog ground

BST_A

23

P

HS bootstrap supply (BST), capacitor to OUT_A required

BST_B

29

P

HS bootstrap supply (BST), external capacitor to OUT_B required

BST_BIAS

21

P

BIAS bootstrap supply, external capacitor to OUT_BIAS required

BST_C

30

P

HS bootstrap supply (BST), external capacitor to OUT_C required

BST_D

37

P

HS bootstrap supply (BST), external capacitor to OUT_D required

BST_E

38

P

HS bootstrap supply (BST), external capacitor to OUT_E required

BST_F

44

P

HS bootstrap supply (BST), external capacitor to OUT_F required

GND

11

P

Chip ground

GVDD_ABC

20

P

Gate drive voltage supply

GVDD_DEF

3

P

Gate drive voltage supply

M1

10

I

Mode selection pin

M2

9

I

Mode selection pin

M3

8

I

Mode selection pin

OC_ADJ

14

O

Overcurrent threshold programming pin, resistor to ground required

OTW

16

O

Overtemperature warning open-drain output signal, active-low

OUT_A

25

O

Output, half-bridge A, satellite

OUT_B

27

O

Output, half-bridge B, satellite

OUT_BIAS

22

O

BIAS half-bridge output pin

OUT_C

32

O

Output, half-bridge C, subwoofer

OUT_D

35

O

Output, half-bridge D, satellite

OUT_E

40

O

Output, half-bridge E, satellite

OUT_F

42

O

Output, half-bridge F, satellite

PGND_AB

26

P

Power ground

PGND_C

33

P

Power ground

PGND_D

34

P

Power ground

PGND_EF

1, 41

P

Power ground

PVDD_A

24

P

Power-supply input for half-bridge A

PVDD_B

28

P

Power-supply input for half-bridge B

PVDD_C

31

P

Power-supply input for half-bridge C

PVDD_D

36

P

Power-supply input for half-bridge D

PVDD_E

39

P

Power-supply input for half-bridge E

PVDD_F

43

P

Power-supply input for half-bridge F

PWM_A

19

I

PWM input signal for half-bridge A

PWM_B

18

I

PWM input signal for half-bridge B

PWM_C

17

I

PWM input signal for half-bridge C

PWM_D

6

I

PWM input signal for half-bridge D

PWM_E

5

I

PWM input signal for half-bridge E

PWM_F

2

I

PWM input signal for half-bridge F

RESET

7

I

Reset signal (active-low logic)

SD

15

O

Shutdown open-drain output signal, active-low

VDD

4

P

Power supply for digital voltage regulator

VREG

13

O

Digital regulator supply filter pin, output

(1)

I = input; O = output; P = power

3