STV8207 datasheet(40/149 Pages) STMICROELECTRONICS

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I²S Interface (In / Out)

STV82x7

40/149

I²S Interface (In / Out)

The STV82x7 offers three input/output choices: one I²S input, three I²S inputs or one I²S output.

6.1

I²S Inputs

The STV82x7 can interface with a digital sound decoder. In this case, the digital data can be input

at a speed of 0.384 Mbytes/s (3.072 MHz for a 48 kHz sampling frequency with 32 bits of data).In

compliance with Dolby

® specifications, only the sampling frequency is subject to restrictions. All

other requirements are extracted from other various specifications.

The PCMCLK (possible clock for upsampling) is provided by the master which is the digital sound

decoder. A sample rate conversion (SRC) will be necessary in the second case (STV82x7 slave) in

order to have a fixed frequency output from this block (either 32 kHz, 44.1 kHz or 48 kHz).

Note:

The SRC function is only available in single I²S input mode.

The I²S interface is used in two ways depending on the package:

1. The interface with one I²S (I²S_DATA0) connection (only stereo or stereo-coded Dolby

® Pro

Logic

®);

2. One interface with three I²S connections connected to the DSP to allow the processing of a

multi-channel signal (maximum of 6 channels).

Table 5: I²S Characteristics

Sampling Frequency (kHz)

8, 11.025, 12,16, 22.05, 24, 32, 44.1 and 48

Data Size

16, 18*, 20*, 24*, 32

PCMCLK

512 x fS

1 2

1. means that the number is the number of effective bits but the transmission is with 32 bits.

2. 512 x fs is used by the DACs if 512 x fs is present.

Figure 25: I²S Block Diagram

Audio Processing

SRC x 2

SRC x 4

I²S_DATA0

I²S_DATA1

I²S_DATA2

fS Input = 8 to 48 kHz

fS Input = 32 to 48 kHz

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