AT90LS8535 datasheet(53/127 Pages) ATMEL

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AT90S/LS8535

1041H–11/01

Prevent EEPROM

Corruption

During periods of low VCC, the EEPROM data can be corrupted because the supply volt-

age is too low for the CPU and the EEPROM to operate properly. These issues are the

same as for board level systems using the EEPROM and the same design solutions

should be applied.

An EEPROM data corruption can be caused by two situations when the voltage is too

low. First, a regular write sequence to the EEPROM requires a minimum voltage to

operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the

supply voltage for executing instructions is too low.

EEPROM data corruption can easily be avoided by following these design recommen-

dations (one is sufficient):

Keep the AVR RESET active (low) during periods of insufficient power supply

voltage. This is best done by an external low VCC Reset Protection circuit, often

referred to as a Brown-out Detector (BOD). Please refer to application note AVR

180 for design considerations regarding power-on reset and low-voltage

detection.

Keep the AVR core in Power-down Sleep Mode during periods of low VCC. This

will prevent the CPU from attempting to decode and execute instructions, effec-

tively protecting the EEPROM registers from unintentional writes.

Store constants in Flash memory if the ability to change memory contents from

software is not required. Flash memory cannot be updated by the CPU and will

not be subject to corruption.

AT90LS8535 bảng dữ liệu(PDF) 53 Page - ATMEL Corporation