1

®

FN8177.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

X9313

Terminal Voltages ±5V, 32 Taps

Digitally Controlled Potentiometer

(XDCP™)

The Intersil X9313 is a digitally controlled potentiometer

(XDCP). The device consists of a resistor array, wiper

switches, a control section, and nonvolatile memory. The

wiper position is controlled by a 3-wire interface.

The potentiometer is implemented by a resistor array

composed of 31 resistive elements and a wiper switching

network. Between each element and at either end are tap

points accessible to the wiper terminal. The position of the

wiper element is controlled by the CS, U/D, and INC inputs.

The position of the wiper can be stored in nonvolatile

memory and then be recalled upon a subsequent power-up

operation.

The device can be used as a three-terminal potentiometer or

as a two-terminal variable resistor in a wide variety of

applications including:

• Control

• Parameter adjustments

• Signal processing

Features

• Solid-state potentiometer

• 3-wire serial interface

• 32 wiper tap points

- Wiper position stored in nonvolatile memory and

recalled on power-up

• 31 resistive elements

- Temperature compensated

- End to end resistance range ± 20%

- Terminal voltages, -5V to +5V

• Low power CMOS

- Active current, 3mA max.

- Standby current, 500µA max.

• High reliability

- Endurance, 100,000 data changes per bit

- Register data retention, 100 years

• Packages

- 8 Ld SOIC, MSOP and DIP

• Pb-free plus anneal available (RoHS compliant)

Block Diagrams

5-BIT

NONVOLATILE

MEMORY

STORE AND

RECALL

CONTROL

CIRCUITRY

ONE

OF

DECODER

RESISTOR

ARRAY

U/D

INC

CS

TRANSFER

GATES

THIRTY

CONTROL

UP/DOWN

GENERAL

DETAILED

0

1

2

28

29

30

31

TWO

(U/D)

INCREMENT

(INC)

DEVICE SELECT

(CS)

AND

MEMORY

5-BIT

UP/DOWN

COUNTER

Data Sheet

September 9, 2005