2

FN8207.1

August 25, 2005

PIN CONFIGURATION

PIN ASSIGNMENT

NC

NC

3

4

Vcc

SCL

NC

NC

7

8

NC

10

1

18

19

17

20

14

15

13

16

12

11

NC

6

2

SDA

9

NC

5

WP

NC

NC

20 Pin TSSOP

Pin

Name

Function

1

Connection to end of resistor array for (the 256 Tap) DCP 2.

2

Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 2.

3

Connection to other end of resistor array for (the 256 Tap) DCP2.

7WP

Write Protect Control Pin. WP pin is a TTL level compatible input. When held HIGH, Write Protection is

enabled. In the enabled state, this pin prevents all nonvolatile “write” operations. Also, when the Write Pro-

tection is enabled, and the device Block Lock feature is active (i.e. the Block Lock bits are NOT [0,0]), then

no “write” (volatile or nonvolatile) operations can be performed in the device (including the wiper position

of any of the integrated Digitally Controlled Potentiometers (DCPs). The WP pin uses an internal “pull-

down” resistor, thus if left floating the write protection feature is disabled.

8SCL

Serial Clock. This is a TTL level compatible input pin used to control the serial bus timing for data input

and output.

9SDA

Serial Data. SDA is a bidirectional TTL level compatible pin used to transfer data into and out of the de-

vice. The SDA pin input buffer is always active (not gated). This pin requires an external pull up resistor.

10

Vss

Ground.

11

Connection to other end of resistor for (the 100 Tap) DCP 1.

12

Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 1

13

Connection to end of resistor array for (the 100 Tap) DCP 1.

20

Vcc

Supply Voltage.

4, 5, 6,

14, 15,

16, 17,

18, 19

NC

No connect.

SCL

SDA

Data Stable

Data Change

Data Stable

Figure 1.

Valid Data Changes on the SDA Bus

X9521