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ST92195D bảng dữ liệu(PDF) 215 Page - STMicroelectronics

tên linh kiện ST92195D
Giải thích chi tiết về linh kiện  48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER
PDF  249 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST92195D bảng dữ liệu(HTML) 215 Page - STMicroelectronics

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ST92195C/D - ELECTRICAL CHARACTERISTICS
I²C BUS TIMING
1)The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the unde-
fined region of the falling edge of SCL
2)The maximum hold time of the START condition has only to be met if the interface does not stretch the low period
of SCL signal
Cb = total capacitance of one bus line in pF
Symbol
Parameter
Standard I²C
Fast I²C
Unit
Min
Max
Min
Max
TBUF
Bus free time between a STOP and START con-
dition
4.7
1.3
ms
THD:STA
Hold time START condition. After this period,
the first clock pulse is generated
4.0
0.6
µs
TLOW
LOW period of the SCL clock
4.7
1.3
µs
THIGH
HIGH period of the SCL clock
4.0
0.6
µs
TSU:STA
Set-up time for a repeated START condition
4.7
0.6
µs
THD:DAT
Data hold time
0 (1)
0 (1)
0.9(2)
ns
TSU:DAT
Data set-up time
250
100
ns
TR
Rise time of both SDA and SCL signals
1000
20+0.1Cb
300
ns
TF
Fall time of both SDA and SCL signals
300
20+0.1Cb
300
ns
TSU:STO
Set-up time for STOP condition
4.0
0.6
ns
Cb
Capacitive load for each bus line
400
400
pF



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