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ST92195D bảng dữ liệu(PDF) 203 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER
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ST92195C/D - VOLTAGE SYNTHESIS TUNING CONVERTER (VS)
VOLTAGE SYNTHESIS (Cont’d)
BRM Generation
The BRM bits allow the addition of a pulse to wid-
en a standard PWM pulse for specific PWM cy-
cles. This has the effect of “fine-tuning” the PWM
Duty cycle (without modifying the base duty cycle),
thus, with the external filtering, providing additional
fine voltage steps.
The incremental pulses (with duration of TINTCLK/
4) are added to the beginning of the original PWM
pulse and thus cause the PWM high time to be ex-
tended by this time with a corresponding reduction
in the low time. The PWM intervals which are add-
ed to are specified in the lower 7 bits of the tuning
word and are encoded as shown in the following
table.
Table 36. 7-Bit BRM Pulse Addition Positions
The BRM values shown may be combined togeth-
er to provide a summation of the incremental pulse
intervals specified.
The pulse increment corresponds to the PWM res-
olution.
Figure 110. Simplified Filtered Voltage Output Schematic with BRM added
Fine Tuning
No. of Pulses added at the
following Cycles
0000001
64
0000010
32, 96
0000100
16, 48, 80, 112
0001000
8, 24,... 104, 120
0010000
4, 12,... 116, 124
0100000
2, 6,... 122, 126
1000000
1, 3,... 125, 127
VDD
PWMOUT
0V
VDD
OUTPUT
VOLTAGE
0V
BRM = 1
BRM = 0
T
INTCLK/4
BRM
EXTENDED PULSE
==
=



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