CS42438-DMZ datasheet(52/64 Pages) CIRRUS

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DS646PP2

8.1.1 Passive Input Filter

The passive filter implementation shown in Figure 22 will attenuate any noise energy at

6.144 MHz but will not provide optimum source impedance for the ADC modulators. Full analog

performance will therefore not be realized using a passive filter. Figure 22 illustrates the unity

gain, passive input filter solution. In this topology the distortion performance is affected, but the

dynamic range performance is not limited.

8.1.2 Passive Input Filter w/Attenuation

Some applications may require signal attenuation prior to the ADC. The full-scale input voltage

will scale with the analog power supply voltage. For VA = 5.0 V, the full-scale input voltage is

approximately 2.8 Vpp, or 1 Vrms (most consumer audio line-level outputs range from 1.5 to

2Vrms).

Figure 23 shows a passive input filter with 6 dB of signal attenuation. Due to the relatively high

input impedance on the analog inputs, the full distortion performance cannot be realized. Also,

the resistor divider circuit will determine the input impedance into the input filter. In the circuit

shown in Figure 23, the input impedance is approximately 5 k

Ω. By doubling the resistor values,

the input impedance will increase to 10 k

Ω. However, in this case the distortion performance will

drop due to the increase in series resistance on the analog inputs.

2700 pF

C0G

µF

100 k

Ω

150

Ω

AIN1+,2+,3+,4+

AIN1-,2-,3-,4-

ADC1-2

4.7

µF

AIN5A,6A

AIN5B,6B

ADC3

2700 pF

C0G

µF

100 k

Ω

150

Ω

2700 pF

C0G

µF

100 k

Ω

150

Ω

Figure 22. Passive Input Filter

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