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CS44L11 bảng dữ liệu(PDF) 28 Page - Cirrus Logic

tên linh kiện CS44L11
Giải thích chi tiết về linh kiện  Low Voltage Class-D PWM Headphone Amplifier
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
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DS640PP4
CS44L11
7. CONTROL PORT INTERFACE
The control port is used to load all the internal settings. The operation of the control port may be completely asyn-
chronous with the audio sample rate. However, to avoid potential interference problems, the control port pins should
remain static if no operation is required.
The CS44L11 has MAP auto increment capability, enabled by the INCR bit in the MAP register, which is the MSB.
If INCR is 0, then the MAP will stay constant for successive writes. If INCR is set to 1, then MAP will auto increment
after each byte is written, allowing block reads or writes of successive registers.
7.1
I²C Format
SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL, with a clock to
data relationship as shown in Figure 7. The receiving device should send an acknowledge (ACK) after each
byte received. The chip address is 0010011.
Note:
MCLK is required during all I²C transactions.
7.1.1
Writing in I²C Format
To communicate with the CS44L11, initiate a START condition of the bus. Next, send the chip address.
The eighth bit of the address byte is the R/W bit (low for a write). The next byte is the Memory Address
Pointer, MAP, which selects the register to be read or written. The MAP is then followed by the data to be
written. To write multiple registers, continue providing a clock and data, waiting for the CS44L11 to ac-
knowledge between each byte. To end the transaction, send a STOP condition.
7.1.2
Reading in I²C Format
To communicate with the CS44L11, initiate a START condition of the bus. Next, send the chip address.
The eighth bit of the address byte is the R/W bit (high for a read). The contents of the register pointed to
by the MAP will be output after the chip address. To read multiple registers, continue providing a clock
and issue an ACK after each byte. To end the transaction, send a STOP condition.
7.2
Memory Address Pointer (MAP)
7.2.1
INCR (Auto Map Increment Enable)
Default = ‘0’
0 - Disabled
1 - Enabled
76543210
INCR
Reserved
Reserved
Reserved
MAP3
MAP2
MAP1
MAP0
00000000



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