54HC08 datasheet(4/5 Pages) SS

4 / 5 page

High Speed CMOS Logic – 54HC08

DC Electrical Characteristics Continued (Voltages Referenced to GND)

Rev 1.0

07/02/19

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

FULL RANGE

UNITS

5. Not production tested in die form, characterized by chip design and tested in package.

25°C

85°C

2.0V

1.9

4.5V

4.4

6.0V

VIN = VIH or VIL

│IOUT│≤ 20µA

5.9

3.0V

VIN = VIH or VIL

│IOUT│≤ 2.4mA

2.48

2.34

2.20

4.5V

VIN = VIH or VIL

│IOUT│≤ 4.0mA

3.98

3.84

3.70

Minimum High-Level

Output Voltage

VOH

VIN = VIH or VIL

6.0V

│IOUT│≤ 5.2mA

5.48

5.34

5.20

2.0V

0.1

4.5V

0.1

6.0V

VIN = VIL or VIL

│IOUT│≤ 20µA

0.1

3.0V

VIN = VIL or VIL

│IOUT│≤ 2.4mA

0.26

0.33

0.40

4.5V

VIN = VIL or VIL

│IOUT│≤ 4.0mA

0.26

0.33

0.40

Maximum Low-Level

Output Voltage

VOL

6.0V

VIN = VIL or VIL

│IOUT│≤ 5.2mA

0.26

0.33

0.40

Maximum Input

Leakage Current

IIN

6.0V

VIN = VCC or GND

±0.1

±1.0

µA

Maximum Quiescent

Supply Leakage

Current

ICC

6.0V

VIN = VCC or GND

IOUT = 0µA

µA

4. -55˚C ≤ TJ ≤ +125˚C

AC Electrical Characteristics5

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

UNITS

2.0V

110

3.0V

4.5V

Maximum Propagation

Delay, Input A or B to

Output Y

(Figure 1,2)

tPLH, tPHL

6.0V

CL = 50pF,

Input

tr = tf = 6ns

2.0V

110

3.0V

4.5V

Maximum Output Rise

and Fall Time,

Any Output

(Figure 1,2)

tTLH, tTHL

CL = 50pF,

Input

tr = tf = 6ns

6.0V

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