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74LVC2G16GF bảng dữ liệu(PDF) 7 Page - Nexperia B.V. All rights reserved

tên linh kiện 74LVC2G16GF
Giải thích chi tiết về linh kiện  Dual buffer gate
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74LVC2G16
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Product data sheet
Rev. 2 — 12 October 2016
7 of 14
Nexperia
74LVC2G16
Dual buffer gate
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 7.
Test circuit for measuring switching times
Table 10.
Test data
Supply voltage
Input
Load
VEXT
VCC
VI
tr =tf
CL
RL
tPLH, tPHL
1.65 V to 1.95 V
VCC
 2.0ns
30pF
1k
open
2.3 V to 2.7 V
VCC
 2.0ns
30pF
500
open
2.7V
2.7V
 2.5ns
50pF
500
open
3.0V to 3.6V
2.7V
 2.5ns
50pF
500
open
4.5 V to 5.5 V
VCC
 2.5ns
50pF
500
open



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