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74LVC2G16 bảng dữ liệu(PDF) 2 Page - Nexperia B.V. All rights reserved |
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74LVC2G16 bảng dữ liệu(HTML) 2 Page - Nexperia B.V. All rights reserved |
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2 / 14 page ![]() © Nexperia B.V. 2017. All rights reserved 74LVC2G16 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 2 — 12 October 2016 2 of 14 Nexperia 74LVC2G16 Dual buffer gate 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 6. Pinning information 6.1 Pinning Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G16GW 40 Cto +125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVC2G16GM 40 Cto +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm SOT886 74LVC2G16GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm SOT891 Table 2. Marking Type number Marking code[1] 74LVC2G16GW YU 74LVC2G16GM YU 74LVC2G16GF YU Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) Fig 4. Pin configuration SOT363 Fig 5. Pin configuration SOT886 and SOT891 |
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