IRU3137CS datasheet(9/19 Pages) IRF

9 / 19 page

IRU3137

Rev. 1.0

06/22/04

www.irf.com

Choose IRF7832 for both control MOSFET and synchro-

nous MOSFET. This device provides low on-resistance

in a compact SOIC 8-Pin package.

The MOSFET has the following data:

The total conduction losses will be:

The switching loss is more difficult to calculate, even

though the switching transition is well understood. The

reason is the effect of the parasitic components and

switching times during the switching procedures such

as turn-on / turnoff delays and rise and fall times. The

control MOSFET contributes to the majority of the switch-

ing losses in synchronous Buck converter. The synchro-

nous MOSFET turns on under zero voltage conditions,

therefore, the turn on losses for synchronous MOSFET

can be neglected. With a linear approximation, the total

switching loss can be expressed as:

The switching time waveform is shown in Figure 7.

Figure 7 - Switching time waveforms.

From IRF7832 data sheet we obtain:

These values are taken under a certain condition test.

For more details please refer to the IRF7466 and IRF7458

data sheets.

By using equation (12), we can calculate the total switch-

ing losses.

Feedback Compensation

The IRU3137 is a voltage mode controller; the control

loop is a single voltage feedback path including error

amplifier and error comparator. To achieve fast transient

response and accurate output regulation, a compensa-

tion circuit is necessary. The goal of the compensation

network is to provide a closed loop transfer function with

the highest 0dB crossing frequency and adequate phase

margin (greater than 45 ).

The output LC filter introduces a double pole, –40dB/

decade gain slope above its corner resonant frequency,

and a total phase lag of 180 (see Figure 8). The Reso-

nant frequency of the LC filter is expressed as follows:

Figure 9 shows gain and phase of the LC filter. Since we

already have 180 phase shift just from the output filter,

the system risks being unstable.

Figure 8 - Gain and phase of LC filter.

PCON(TOTAL) = PCON(UPPER) + PCON(LOWER)

PCON(TOTAL) = 1.166W

PSW(TOTAL) = 250mW

IRF7832

VDSS = 30V

ID = 20A @ 25 C

RDS(ON) = 4m

Ω @ VGS=10V

Where:

VDS(OFF) = Drain to Source Voltage at off time

tr = Rise Time

tf = Fall Time

T = Switching Period

ILOAD = Load Current

PSW =

ILOAD

---(12)

VDS(OFF)

tr + tf

IRF7832

tr = 12.3ns

tf = 21ns

FLC =

---(13)

π× LO×CO

VDS

VGS

10%

90%

td(ON)

td(OFF)

Gain

FLC

0dB

Phase

FLC

-180

Frequency

-40dB/decade

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