ICS93776 datasheet(6/8 Pages) ICST

tên linh kiện	ICS93776

Giải thích chi tiết về linh kiện	Low Cost DDR Phase Lock Loop Zero Delay Buffer

PDF	8 Pages

Scroll/Zoom	100%

nhà sản xuất	ICST [Integrated Circuit Systems]

Trang chủ	http://www.icst.com

Logo

6 / 8 page

ICS93776

0793A—03/08/05

Bytes 2 to 6 are reseved power up default = 1. This allows operation with main clock.

Pin #

Name

PWD

Bit 7

2, 1

DDR0(T&C)

Output Control

DISABLE ENABLE

Bit 6

4, 5

DDR1(T&C)

Output Control

DISABLE ENABLE

Bit 5

Reserved

Bit 4

Reserved

Bit 3

13, 14

DDR2(T&C)

Output Control

DISABLE ENABLE

Bit 2

26, 27

DDR5(T&C)

Output Control

DISABLE ENABLE

Bit 1

Reserved

Bit 0

24, 25

DDR4(T&C)

Output Control

DISABLE ENABLE

Note:

Pin #

Name

PWD

Bit 7

Reserved

Bit 6

16,17

DDR3(T&C)

Output Control

DISABLE ENABLE

Bit 5

Reserved

Bit 4

Reserved

Bit 3

Reserved

Bit 2

Reserved

Bit 1

Reserved

Bit 0

Reserved

Note:

Control Function

Affected Pin

BYTE

PWD = Power Up Default

Type

Bit Control

Type

Control Function

Affected Pin

Bit Control

ICS93776 bảng dữ liệu(PDF) 6 Page - Integrated Circuit Systems

ICS93776 bảng dữ liệu(HTML) 6 Page - Integrated Circuit Systems

Html Pages

1 2 3 4 5 6 7 8

bảng dữ liệu tải về

Link URL