EM785830AA

8-bit Micro-controller

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* This specification is subject to be changed without notice.

5

12/1/2004

V1.6

VI. Pin Descriptions

PIN

I/O

DESCRIPTION

POWER

AVDD

POWER

Power

AVSS

POWER

Ground

CLOCK

XIN

I

Input pin for 32.768 kHz oscillator

XOUT

O

Output pin for 32.768 kHz oscillator

PLLC

I

Phase loop lock capacitor, connect a capacitor 0.047u to 0.1u to the ground.

10-bit 4 channel A/D

VREF

I (P66)

ADC reference input. Shared with PORT66

AD3

I (P62)

ADC input channel 3. Shared with PORT62

AD4

I (P63)

ADC input channel 4. Shared with PORT63

AD5

I(P64)

ADC input channel 5. Shared with PORT64

AD6

I(P65)

ADC input channel 6. Shared with PORT65

SPI

SCK

IO (PORT76)

Master: output pin, Slave: input pin.

This pin shared with PORT76.

SDO

O (PORT75)

Output pin for serial data transferring. This pin shared with PORT75.

SDI

I (PORT74)

Input pin for receiving data. This pin shared with PORT74.

PWM

PWM1

O

Pulse width modulation output channel 1

This pin shared with PORTC1

PWM2

O

Pulse width modulation output channel 2

This pin shared with PORTC2

IO

P62 ~P67

I/O

PORT6 can be INPUT or OUTPUT port each bit.

P70 ; P73~P76

I/O

PORT7 can be INPUT or OUTPUT port each bit.

P90 ~ P97

I/O

PORT9 can be INPUT or OUTPUT port each bit.

PC1 ~ PC2

I/O

PORTC can be INPUT or OUTPUT port each bit.

INT0

PORT70

Interrupt sources. Once PORT70 has a falling edge or rising edge signal

(controlled by CONT register), it will generate a interruption.

INT3

PORT73

Interrupt sources which has the same interrupt flag. Any pin from PORT73

has a falling edge signal, it will generate a interruption.

/RESET

I

Low reset