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PCI6421 bảng dữ liệu(PDF) 192 Page - Texas Instruments

tên linh kiện PCI6421
Giải thích chi tiết về linh kiện  DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PDF  204 Pages
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PCI6421 bảng dữ liệu(HTML) 192 Page - Texas Instruments

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9−14
9.23 Subsystem ID Alias Register
The contents of the subsystem access register are aliased to the subsystem vendor ID and subsystem ID registers
at PCI offsets 2Ch and 2Eh, respectively. See Table 9−14 for a complete description of the register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Subsystem ID alias
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
1
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Subsystem ID alias
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
1
0
0
0
0
0
1
0
0
1
1
0
0
Register:
Subsystem ID alias
Offset:
50h
Type:
Read/Write (EEPROM, GRST only)
Default:
8035 104Ch
Table 9−14. Subsystem ID Alias Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
31−16
SubsystemID
RW
Subsystem device ID. The value written to this field is aliased to the subsystem ID register at
PCI offset 2Eh.
15−0
SubsystemVendorID
RW
Subsystem vendor ID. The value written to this field is aliased to the subsystem vendor ID
register at PCI offset 2Ch.
9.24 Class Code Alias Register
This register is alias of the class code. Not like original register, this register is read/write and loadable from EEPROM.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Class code alias
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Class code alias
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Class code alias
Offset:
54h
Type:
Read-only, Read/Write (EEPROM, GRST only)
Default:
0780 0000h



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