PCI6421 datasheet(151/204 Pages) TI

151 / 204 page

7−7

7.9

Subsystem Vendor Identification Register

The subsystem identification register, used for system and option card identification purposes, may be required for

certain operating systems. This read-only register is initialized through the EEPROM and can be written through the

subsystem access register at PCI offset 50h (see Section 7.22). All bits in this register are reset by GRST only.

Bit

Name

Subsystem vendor identification

Type

Default

Subsystem vendor identification

Offset:

2Ch

Type:

Read/Update

Default:

0000h

7.10 Subsystem Identification Register

The subsystem identification register, used for system and option card identification purposes, may be required for

certain operating systems. This read-only register is initialized through the EEPROM and can be written through the

subsystem access register at PCI offset 50h (see Section 7.22). All bits in this register are reset by GRST only.

Bit

Name

Subsystem identification

Type

Default

Subsystem identification

Offset:

2Eh

Type:

Read/Update

Default:

0000h

7.11 Capabilities Pointer Register

The power management capabilities pointer register provides a pointer into the PCI configuration header where the

power-management register block resides. Since the PCI power management registers begin at 44h, this read-only

Bit

Name

Capabilities pointer

Type

Default

Capabilities pointer

Offset:

34h

Type:

Read-only

Default:

44h

PCI6421 bảng dữ liệu(PDF) 151 Page - Texas Instruments

PCI6421 bảng dữ liệu(HTML) 151 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL