STLC1510 datasheet(34/40 Pages) STMICROELECTRONICS

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STLC1510

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Forum Technical Committee’s Utopia Level 1

and Utopia Level 2 specifications, and Chapter

7 of this document, Network Interface and

Controller (NIF).

Features of MPHY Layer Cell-Level Handshake (Tx

Direction):

A single MPHY port at a time is selected for a

cell transmission. However, another MPHY port

may be polled for its TxClav status while the

selected MPHY port transfers data. The ATM

layer polls the TxClav status of a MPHY port by

placing its address on TxAddr. The MPHY port

(STLC1510 device) drives TxClav during each

cycle following one with its address on the

TxAddr lines.

The ATM layer selects a MPHY port for transfer

by placing the desired MPHY address onto

TxAddr, when TxEnb is deasserted (high)

during the current clock cycle, and asserted

(low) during the next clock cycle. All MPHY

devices only examine the value on TxAddr for

selection purposes when TxEnb is deasserted

(high). The MPHY port is selected starting from

the cycle after its address is on the TxAddr lines,

and TxEnb is deasserted (high); and ending in

the cycle a new MPHY port is addressed for

selection, and TxEnb is deasserted (high).

Figure 23. depicts the polling phase and the selection

phase of the UTOPIA2 transmit interface. After the

selection of the MPHY port, the cell transfer is exe-

cuted the same way as in UTOPIA Level 1.

Figure 23. UTOPIA Level 2 transmit timing, polling phase and selection phase.

Tx Clk

Tx E nb

UT xD ata

Tx Clav

Tx S OC

N-1

P 40

P 41

P4 2

P 43

P44

P 45

P46

P 47

P48

H 1

H 2

H 3

H 4

1 F

N+1

N+3

N+ 1

N+3

N-1

N+3

N+1

NN + 3

N+1

Tx A dd r

PHY N

PH Y N + 3

polling

po lling

C ell trans m iss ion to:

se le ctio n

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