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DSC1101 bảng dữ liệu(PDF) 2 Page - Microchip Technology

tên linh kiện DSC1101
Giải thích chi tiết về linh kiện  Low-Jitter Precision CMOS Oscillator
PDF  30 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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DSC1101 bảng dữ liệu(HTML) 2 Page - Microchip Technology

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DSC1101/21
DS20005613B-page 2
 2017 Microchip Technology Inc.
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Input Voltage, VIN ..............................................................................................................................–0.3V to VDD + 0.3V
Supply Voltage .......................................................................................................................................... –0.3V to +4.0V
ESD Protection On All Pins ...........................................................................................4000V HBM, 1500V CDM (max.)
† Notice:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Note:
1000+ years of data retention on internal memory.
TABLE 1-1:
DC CHARACTERISTICS
Electrical Characteristics
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Supply Voltage (Note 1)VDD
2.25
—
3.6
V
—
Supply Current
IDD
—
—
0.095
mA
DSC1101, EN pin low, output
is disabled
—20
22
DSC1121, EN pin low, output
is disabled
—31
35
Output enabled, CL = 15 pF,
F0 = 100 MHz
Frequency Stability
(Including frequency
variations due to initial
tolerance, temp. and
power supply voltage.)
f
——
±10
ppm
Ext Comm. & Ind. only
±20
All temp ranges
—
—
±25
All temp ranges
—
—
±50
All temp ranges
Aging
f
—
—
±5
ppm
1 year @ 25°C
Startup Time (Note 2)tSU
—
—
5
ms
T = 25°C
Input Logic Levels
Input Logic High
Input Logic Low
VIH
0.75
V
DD
——
V—
VIL
——
0.1
V
DD
Output Disable Time
(Note 3)
tDS
——
5
ns
—
Output Enable Time
tEN
—
—
5
ms
DSC1101
—
—
20
ns
DSC1121
Enable Pull-up Resistor
(Note 4)
——
40
—
k
Pull-up Resistor Exist
CMOS Output
Output Logic Levels
Output Logic High
Output Logic Low
VOH
0.9
V
DD
——
VI = ±6 mA
VOL
——
0.1
V
DD
Note 1:
Pin 6 VDD should be filtered with 0.1 µF capacitor.
2:
tSU is time to 100 ppm of output frequency after VDD is applied and outputs are enabled.
3:
Output Waveform and Test Circuit figures define the parameters.
4:
Output is enabled if pad is floated or not connected.



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