Cyclone V Device Overview

power consumption, cost, and time-to-market requirements; and the increasing

bandwidth requirements for high-volume and cost-sensitive applications.

Enhanced with integrated transceivers and hard memory controllers, the Cyclone V

devices are suitable for applications in the industrial, wireless and wireline, military,

and automotive markets.

Related Information

Cyclone V Device Handbook: Known Issues

Lists the planned updates to the Cyclone V Device Handbook chapters.

Key Advantages of Cyclone V Devices

Table 1.

Key Advantages of the Cyclone V Device Family

Advantage

Supporting Feature

Lower power consumption

• Built on TSMC's 28 nm low-power (28LP) process technology and includes an

abundance of hard intellectual property (IP) blocks

• Up to 40% lower power consumption than the previous generation device

Improved logic integration and

differentiation capabilities

• 8-input adaptive logic module (ALM)

• Up to 13.59 megabits (Mb) of embedded memory

• Variable-precision digital signal processing (DSP) blocks

Increased bandwidth capacity

• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers

• Hard memory controllers

Hard processor system (HPS)

with integrated Arm* Cortex*-A9

MPCore* processor

• Tight integration of a dual-core Arm Cortex-A9 MPCore processor, hard IP, and an

FPGA in a single Cyclone V system-on-a-chip (SoC)

• Supports over 128 Gbps peak bandwidth with integrated data coherency between

the processor and the FPGA fabric

Lowest system cost

• Requires only two core voltages to operate

• Available in low-cost wirebond packaging

• Includes innovative features such as Configuration via Protocol (CvP) and partial

reconfiguration

CV-51001 | 2018.05.07

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