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VSC8504-02 bảng dữ liệu(PDF) 47 Page - Microsemi Corporation |
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VSC8504-02 bảng dữ liệu(HTML) 47 Page - Microsemi Corporation |
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47 / 131 page ![]() Functional Descriptions VMDS-10507 VSC8504-02 Datasheet Revision 4.2 36 else tmp3 = tmp2 & 0x0fe0; tmp4 = tmp3 | 0x8006; PhyWrite(PhyBaseAddr, 18, tmp4); if (SGMII) PhyWrite(PhyBaseAddr, 18, 0x9p40); // where “p” is the logical address of the SGMII interface else PhyWrite(PhyBaseAddr, 18, 0x8p40); // where “p” is the logical address of the Fiber media interface // PhyBaseAddr is the 5-bit base address of the internal PHYs. // The upper 3 bits are set by the PHYADD[4:2] pins and the // lower 2 bits are 0. Additional configuration of the enhanced SerDes macro is required for facility loopback mode. When entering facility loopback mode, the set = 1 option should be run; when exiting facility loopback mode, the set = 0 option should be run. PhyWrite(PhyBaseAddr, 31, 0x0010); PhyWrite(PhyBaseAddr, 18, 0x8013); PhyWrite(PhyBaseAddr, 18, 0xd7cb); PhyWrite(PhyBaseAddr, 18, 0x8007); tmp1 = PhyRead(PhyBaseAddr, 18); tmp2 = tmp1 & 0x0ff0; if (set) tmp3 = tmp2 | 0x0100; else tmp3 = tmp2 & 0x0ef0; tmp4 = tmp3 | 0x8006; PhyWrite(PhyBaseAddr, 18, tmp4); PhyWrite(PhyBaseAddr, 18, 0x9c40); // PhyBaseAddr is the 5-bit base address of the internal PHYs. // The upper 3 bits are set by the PHYADD[4:2] pins and the // lower 2 bits are 0. 3.17.6.5 Equipment Loop The 1-bit data stream at the serializer output is looped back to the deserializer and replaces the received data stream from the input buffer. This test loop provides the possibility to verify the digital data path internally. The transmit data goes through the serialization, the clock and data recovery and deserialization before the data is fed back to the digital core. Note: After entering equipment loopback mode, the following workaround should be run with set = 1 option in case external signal is not present; when exiting equipment loopback mode, the set = 0 option should be run: SGMII/QSGMII SerDes PhyWrite(<phy>, 31, 0x52b5); PhyWrite(<phy>, 16, 0xa68c); tmp17 = PhyRead(<phy>,17); if (set) tmp17 |= 0x0010; //Set SigDet as desired, Set bit 4 else // clear SigDet tmp17 &= 0xffef; //Clear SigDet, bit 4 PhyWrite(<phy>, 17, tmp17); PhyWrite(<phy>, 16, 0x868c); PhyWrite(<phy>, 31, 0x0); Fiber media SerDes PhyWrite(<phy>, 31, 0x52b5); PhyWrite(<phy>, 16, 0xa68a); |
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