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STM32L433CB bảng dữ liệu(PDF) 190 Page - STMicroelectronics

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STM32L433CB bảng dữ liệu(HTML) 190 Page - STMicroelectronics

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Electrical characteristics
STM32L433xx
190/225
DS11449 Rev 5
Figure 40. SAI slave timing waveforms
SDMMC characteristics
Unless otherwise specified, the parameters given in Table 99 for SDIO are derived from
tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage
conditions summarized in Table 22: General operating conditions, with the following
configuration:
•
Output speed is set to OSPEEDRy[1:0] = 11
•
Capacitive load C = 30 pF
•
Measurement points are done at CMOS levels: 0.5 ₓ VDD
Refer to Section 6.3.14: I/O port characteristics for more details on the input/output
characteristics.
Table 99. SD / MMC dynamic characteristics, VDD=2.7 V to 3.6 V(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fPP
Clock frequency in data transfer mode
-
0
-
50
MHz
-
SDIO_CK/fPCLK2 frequency ratio
-
-
-
4/3
-
tW(CKL)
Clock low time
fPP = 50 MHz
8
10
-
ns
tW(CKH)
Clock high time
fPP = 50 MHz
8
10
-
ns
CMD, D inputs (referenced to CK) in MMC and SD HS mode
tISU
Input setup time HS
fPP = 50 MHz
3.5
-
-
ns
tIH
Input hold time HS
fPP = 50 MHz
2.5
-
-
ns
CMD, D outputs (referenced to CK) in MMC and SD HS mode
tOV
Output valid time HS
fPP = 50 MHz
-
12
13
ns
tOH
Output hold time HS
fPP = 50 MHz
10
-
-
ns
CMD, D inputs (referenced to CK) in SD default mode
tISUD
Input setup time SD
fPP = 50 MHz
3.5
-
-
ns
tIHD
Input hold time SD
fPP = 50 MHz
3
-
-
ns
MS32772V1
SAI_SCK_X
SAI_FS_X
(input)
SAI_SD_X
(transmit)
tsu(FS)
Slot n
SAI_SD_X
(receive)
tw(CKH_X)
th(FS)
Slot n+2
tv(SD_ST)
th(SD_ST)
Slot n
tsu(SD_SR)
tw(CKL_X)
th(SD_SR)
1/fSCK



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