3

Data Sheet M16335EJ3V

1DS

Pin Configuration

/xxx indicates active low signal.

48-pin TAPE FBGA (8 x 6)

6

5

4

3

2

1

A

B

C

D

E

F

G

H

H

G

F

E

D

C

B

A

Top View

Bottom View

A

B

C

D

E

F

G

H

H

G

F

E

D

C

B

A

6

A13

A12

A14

A15

A16

WORD,

O15,

GND

6

GND

O15,

WORD,

A16

A15

A14

A12

A13

/BYTE

A–1

A–1

/BYTE

5

A9

A8

A10

A11

O7

O14

O13

O6

5

O6

O13

O14

O7

A11

A10

A8

A9

4

NC

NC

A21

A19

O5

O12

O4

4

O4

O12

O5

A19

A21

NC

NC

3

NC

NC

A18

A20

O2

O10

O11

O3

3

O3

O11

O10

O2

A20

A18

NC

NC

2

A7

A17

A6

A5

O0

O8

O9

O1

2

O1

O9

O8

O0

A5

A6

A17

A7

1

A3

A4

A2

A1

A0

/CE

/OE or

GND

1

GND

/OE or

/CE

A0

A1

A2

A4

A3

OE

OE

A0 to A21

: Address inputs

O0 to O7, O8 to O14 : Data outputs

O15, A–1

: Data output 15 (WORD mode),

LSB Address input (BYTE mode)

WORD, /BYTE

: Mode select

/CE

: Chip Enable

/OE or OE

: Output Enable

: Supply voltage

GND

: Ground

NC

Note

: No Connection

DC

: Don’t Care

Note Some signals can be applied because this pin is not connected to the inside of the chip.

Remark Refer to Package Drawing for the index mark.