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EMC1812 bảng dữ liệu(PDF) 62 Page - Microchip Technology |
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EMC1812 bảng dữ liệu(HTML) 62 Page - Microchip Technology |
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62 / 102 page ![]() 6.10.21 Consecutive Alert Register (Address 22h) Name: CONSEC ALERT Offset: 0x22 Bit 7 6 5 4 3 2 1 0 TMOUT CTHRM[2:0] CALRT[2:0] Access RW RW RW RW RW RW RW Reset 0 1 1 1 0 0 0 Bit 7 – TMOUT Enables the time-out and idle functionality of the I2C protocol. Value Description 1 The I2C time-out and idle functionality are enabled. The I2C interface will time-out if the clock line is held low for longer than 30 ms. Likewise, it will reset if both the data and clock lines are held high for longer than 200 µs. 0 The I2C time-out and idle functionality are disabled. The I2C interface will not time-out if the clock line is held low for longer than 30 ms. Likewise, it will not reset if both the data and clock lines are held high for longer than 200 µs. This is used for I2C compliance. Bits 6:4 – CTHRM[2:0] Determines the number of consecutive measurements that must exceed the corresponding Therm Limit before the THERM pin is asserted. Value Description 000 1 001 2 011 3 111 4 Bits 3:1 – CALRT[2:0] Determines the number of consecutive measurements that must exceed the corresponding Therm Limit before the ALERT pin is asserted. Value Description 000 1 001 2 011 3 111 4 Multi-Channel Low-Voltage Remote Di... System Management Bus Protocol © 2018 Microchip Technology Inc. Datasheet DS20005751A-page 62 |
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