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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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LMT092DNPFWD bảng dữ liệu(PDF) 4 Page - Shenzhen TOPWAY Technology Co., Ltd |
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LMT092DNPFWD bảng dữ liệu(HTML) 4 Page - Shenzhen TOPWAY Technology Co., Ltd |
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4 / 14 page  TOPWAY LCD Module User Manual LMT092DNPFWD NURL: www.topwaydisplay.com www.topwaysz.com Document Name: LMT092DNPFWD-Manual-Rev0.1.doc Page: 4 of 14 3. Terminal Function 3.1 CN1 pin assignment(LVDS interface) FPC down Connector type: FH52E-40S-0.5SH Pin Symbol I/O Description Remark 1 GND P Ground 2 GND P Ground 3 RXO0- I Negative LVDS differential data input. Channel O0 (odd) 4 RXO0+ I Positive LVDS differential data input. Channel O0 (odd) 5 GND P Ground 6 RXO1- I Negative LVDS differential data input. Channel O1 (odd) 7 RXO1+ I Positive LVDS differential data input. Channel O1 (odd) 8 GND P Ground 9 RXO2- I Negative LVDS differential data input. Channel O2 (odd) 10 RXO2+ I Positive LVDS differential data input. Channel O2 (odd) 11 GND P Ground 12 RXOC- I Negative LVDS differential clock input. (odd) 13 RXOC+ I Positive LVDS differential clock input. (odd) 14 GND P Ground 15 RXO3- I Negative LVDS differential data input. Channel O3(odd) 16 RXO3+ I Positive LVDS differential data input. Channel O3 (odd) 17 GND P Ground 18 RXE0- I Negative LVDS differential data input. Channel E0 (even) 19 RXE0+ I Positive LVDS differential data input. Channel E0 (even) 20 GND P Ground 21 RXE1- I Negative LVDS differential data input. Channel E1 (even) 22 RXE1+ I Positive LVDS differential data input. Channel E1 (even) 23 GND P Ground 24 RXE2- I Negative LVDS differential data input. Channel E2 (even) 25 RXE2+ I Positive LVDS differential data input. Channel E2 (even) 26 GND P Ground 27 RXEC- I Negative LVDS differential clock input. (even) 28 RXEC+ I Positive LVDS differential clock input. (even) 29 GND P Ground 30 RXE3- I Negative LVDS differential data input. Channel E3 (even) 31 RXE3+ I Positive LVDS differential data input. Channel E3 (even) 32 GND P Ground 33 GND P Ground 34 CSB I Chip select, Serial interface chip enable signal. CSB=0:Selected. CSB=1: Not selected. 35 SCL I SPI clock 36 SDA I/O Serial interface address and data input/output. 37 NC - Dummy 38 VCC P Power Input 39 VCC P Power Input 40 VCC P Power Input I---Input, O---Output, P--- Power/Ground,“-”---No connection Table 3.1 terminal pin assignments |
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