S-8211CDL-I6T1U datasheet(18/43 Pages) ABLIC

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BATTERY PROTECTION IC FOR 1-CELL PACK

S-8211C Series

Rev.7.7_03

7. Current consumption during power-down, current consumption during overdischarge

(Test condition 5, test circuit 2)

7. 1 With power-down function

The current consumption during power-down (IPDN) is the current that flows through the VDD pin (IDD) under the set

condition of V1 = V2 = 1.5 V (overdischarge status).

7. 2 Without power-down function

The current consumption during overdischarge (IOPED) is the current that flows through the VDD pin (IDD) under the

set condition of V1 = V2 = 1.5 V (overdischarge status).

8. Resistance between VM pin and VDD pin

(Test condition 6, test circuit 3)

The resistance between VM pin and VDD pin (RVMD) is the resistance between VM pin and VDD pin under the set

conditions of V1 = 1.8 V, V2 = 0 V.

9. Resistance between VM pin and VSS pin

(Test condition 6, test circuit 3)

The resistance between VM pin and VSS pin (RVMS) is the resistance between VM pin and VSS pin under the set

conditions of V1 = 3.5 V, V2 = 1.0 V.

10. CO pin resistance "H"

(Test condition 7, test circuit 4)

The CO pin resistance "H" (RCOH) is the resistance at the CO pin under the set conditions of V1 = 3.5 V, V2 = 0 V,

V3 = 3.0 V.

11. CO pin resistance "L"

(Test condition 7, test circuit 4)

The CO pin resistance "L" (RCOL) is the resistance at the CO pin under the set conditions of V1 = 4.5 V, V2 = 0 V,

V3 = 0.5 V.

12. DO pin resistance "H"

(Test condition 8, test circuit 4)

The DO pin resistance "H" (RDOH) is the resistance at the DO pin under the set conditions of V1 = 3.5 V, V2 = 0 V,

V4 = 3.0 V.

13. DO pin resistance "L"

(Test condition 8, test circuit 4)

The DO pin resistance "L" (RDOL) is the resistance at the DO pin under the set conditions of V1 = 1.8 V, V2 = 0 V, V4 =

0.5 V.

14. Overcharge detection delay time

(Test condition 9, test circuit 5)

The overcharge detection delay time (tCU) is the time needed for VCO to change from "H" to "L" just after the voltage

V1 momentarily increases (within 10

s) from overcharge detection voltage (VCU)  0.2 V to overcharge detection

voltage (VCU)  0.2 V under the set condition of V2 = 0 V.

15. Overdischarge detection delay time

(Test condition 9, test circuit 5)

The overdischarge detection delay time (tDL) is the time needed for VDO to change from "H" to "L" just after the voltage

V1 momentarily decreases (within 10

s) from overdischarge detection voltage (VDL)  0.2 V to overdischarge

detection voltage (VDL)  0.2 V under the set condition of V2 = 0 V.

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