15/33

L6919E

Figure 9. - Remote Buffer Connections

OUTPUT VOLTAGE MONITOR AND PROTECTIONS

The device monitors through pin VSEN the regulated voltage in order to build the PGOOD signal and manage

the OVP / UVP conditions.

Power good output is forced low if the voltage sensed by VSEN is not within ±12% (Typ.) of the programmed

value. It is an open drain output and it is enabled only after the soft start is finished (2048 clock cycles after start-

up). During Soft-Start this pin is forced low.

Under voltage protection is provided. If the output voltage monitored by VSEN drops below the 60% of the ref-

erence voltage for more than one clock period, the device turns off all mosfets and the OSC/FAULT is driven

high (5V). The condition is latched, to recover it is required to cycle the power supply.

Over Voltage protection is also provided: when the voltage monitored by VSEN reaches the OVP threshold

VOVP the controller permanently switches on both the low-side mosfets and switches off both the high-side

mosfets in order to protect the load. The OSC/ FAULT pin is driven high (5V) and power supply (Vcc) turn off

and on is required to restart operations.

The over voltage percentage is then set by the ratio between the fixed OVP threshold VOVP and the reference

programmed by VID:

Both Over Voltage and Under Voltage are active also during soft start (Under Voltage after than the output volt-

age reaches 0.6V). The reference used in this case to determine the UV thresholds is the increasing voltage

driven by the 2048 soft start digital counter while the reference used for the OV threshold is the final reference

programmed by the VID pins.

SOFT START AND INHIBIT

At start-up a ramp is generated increasing the loop reference from 0V to the final value programmed by VID in

2048 clock periods as shown in figure 10.

Once the soft start begins, the reference is increased: upper and lower MOS begin to switch and the output volt-

age starts to increase with closed loop regulation. At the end of the digital soft start, the Power Good comparator

is enabled and the PGOOD signal is then driven high (See fig. 10). The Under Voltage comparator is enabled

when the reference voltage reaches 0.6V. The Soft-Start will not take place, if both VCC and VCCDR pins are

not above their own turn-on thresholds.

During normal operation, if any under-voltage is detected on one of the two supplies the device shuts down.

Forcing the OSC/INH pin to a voltage lower than 0.6V (Typ.) disables the device: all the power mosfets and

protections are turned off until the condition is removed.

Reference

REMOTE

BUFFER

ERROR

AMPLIFIER

FB

COMP

VSEN

FBG

FBR

Remote

Ground

Remote

64k

64k

64k

64k

Reference

REMOTE

BUFFER

ERROR

AMPLIFIER

FB

COMP

VSEN

FBG

FBR

64k

64k

64k

64k

RB used (±0.5% Accuracy)

RB Not Used

OVP %

[]

V

OVP

Re feren ceVo ltage VID

()

----------------------------------------------------------------------- 100

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