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LM337 bảng dữ liệu(PDF) 2 Page - ON Semiconductor |
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LM337 bảng dữ liệu(HTML) 2 Page - ON Semiconductor |
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2 / 8 page ![]() LM337 2 MOTOROLA ANALOG IC DEVICE DATA MAXIMUM RATINGS Rating Symbol Value Unit Input–Output Voltage Differential VI–VO 40 Vdc Power Dissipation Case 221A TA = +25°C PD Internally Limited W Thermal Resistance, Junction–to–Ambient θJA 65 °C/W Thermal Resistance, Junction–to–Case θJC 5.0 °C/W Case 936 (D2PAK) TA = +25°C PD Internally Limited W Thermal Resistance, Junction–to–Ambient θJA 70 °C/W Thermal Resistance, Junction–to–Case θJC 5.0 °C/W Operating Junction Temperature Range TJ – 40 to +125 °C Storage Temperature Range Tstg – 65 to +150 °C ELECTRICAL CHARACTERISTICS (|VI–VO| = 5.0 V; IO = 0.5 A for T package; TJ = Tlow to Thigh [Note 1]; Imax and Pmax [Note 2].) Characteristics Figure Symbol Min Typ Max Unit Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ |VI–VO| ≤ 40 V 1 Regline – 0.01 0.04 %/V Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax |VO| ≤ 5.0 V |VO| ≥ 5.0 V 2 Regload – – 15 0.3 50 1.0 mV % VO Thermal Regulation, TA = +25°C (Note 6), 10 ms Pulse Regtherm – 0.003 0.04 % VO/W Adjustment Pin Current 3 IAdj – 65 100 µA Adjustment Pin Current Change, 2.5 V ≤ |VI–VO| ≤ 40 V, 10 mA ≤ IL ≤ Imax, PD ≤ Pmax, TA = +25°C 1, 2 ∆IAdj – 2.0 5.0 µA Reference Voltage, TA = +25°C, 3.0 V ≤ |VI–VO| ≤ 40 V, 10 mA ≤ IO ≤ Imax, PD ≤ Pmax, TJ = Tlow to Thigh 3 Vref –1.213 –1.20 –1.250 –1.25 –1.287 –1.30 V Line Regulation (Note 3), 3.0 V ≤ |VI–VO| ≤ 40 V 1 Regline – 0.02 0.07 %/V Load Regulation (Note 3), 10 mA ≤ IO ≤ Imax |VO| ≤ 5.0 V |VO| ≥ 5.0 V 2 Regload – – 20 0.3 70 1.5 mV % VO Temperature Stability (Tlow ≤ TJ ≤ Thigh) 3 TS – 0.6 – % VO Minimum Load Current to Maintain Regulation (|VI–VO| ≤ 10 V) (|VI–VO| ≤ 40 V) 3 ILmin – – 1.5 2.5 6.0 10 mA Maximum Output Current |VI–VO| ≤ 15 V, PD ≤ Pmax, T Package |VI–VO| ≤ 40 V, PD ≤ Pmax, TJ = +25°C, T Package 3 Imax – – 1.5 0.15 2.2 0.4 A RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz N – 0.003 – % VO Ripple Rejection, VO = –10 V, f = 120 Hz (Note 4) Without CAdj CAdj = 10 µF 4 RR – 66 60 77 – – dB Long–Term Stability, TJ = Thigh (Note 5), TA = +25°C for Endpoint Measurements 3 S – 0.3 1.0 %/1.0 k Hrs. Thermal Resistance Junction–to–Case, T Package R θJC – 4.0 – °C/W NOTES: 1. Tlow to Thigh = 0° to +125°C, for LM337T, D2T. Tlow to Thigh = – 40° to +125°C, for LM337BT, BD2T. 2. Imax = 1.5 A, Pmax = 20 W 3. Load and line regulation are specified at constant junction temperature. Change in VO because of heating effects is covered under the Thermal Regulation specification. Pulse testing with a low duty cycle is used. 4. CAdj, when used, is connected between the adjustment pin and ground. 5. Since Long Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 6. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die. These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time. |
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