SM5302A

NIPPON PRECISION CIRCUITS INC.—19

Filter Bypass Mode

In filter bypass mode, the lowpass filter is bypassed and the signal is input to the output buffer stage. The input

type, multiplexer function, and output gain are set just as for filter mode. The cutoff frequency setting and fc

mode setting have no effect on the outputs. In this mode, the passband frequency is 80MHz (typ), which can

support SXGA-class signals.

Input Multiplexer Switching (MUXSEL)

amount of communication time is required, but the setting can be made using the MUXSEL input with arbi-

trary timing for high-speed switching.

Power-ON Reset

When power is applied, an internal power-ON reset circuit operates initializing the internal register flags to

their default settings. At power-ON, all supplies should be applied simultaneously.

Sag Compensation Circuit

A sag compensation circuit is built-in between the OUTnA and OUTnB pins. In circuits where the load resis-

tance is small and the capacitance required is large, using the sag compensation circuit allows the total capaci-

tance and mounting area to be reduced. If the sag compensation circuit is not used, output OUTnA should be

connected to OUTnB. The electrical characteristics are not guaranteed if OUTnB is left open circuit.

Reference Voltage (REF)

The REFn pins (n

= 1, 2, 3) are internal reference voltage outputs. A 10 µF capacitor connected to ground is

recommended for stability. REF1, REF2, and REF3 are independent reference voltage outputs, and have no

correspondence with channels CH-1, CH-2, and CH-3. In disable mode, they are high impedance outputs.

MUXSEL pin

MUX flag

*1. n = 1, 2, 3

L

L

INnA

L

H

INnB

H

L

INnB

H

H

INnB

Figure 4. Connection without sag compensation

circuit

OUTnA

OUTnB

Figure 5. Connection with sag compensation circuit

OUTnA

OUTnB