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SN74AXC4T774

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SCES898 – JULY 2019

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Feature Description (continued)

8.3.5 Over-voltage Tolerant Inputs

Input signals to this device can be driven above the supply voltage so long as they remain below the maximum

input voltage value specified in the Recommended Operating Conditions.

8.3.6 Glitch-free Power Supply Sequencing

Either supply rail may be powered on or off in any order without producing a glitch on the I/Os (that is, where the

output erroneously transitions to VCC when it should be held low). Glitches of this nature can be misinterpreted

by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device

configuration of the peripheral, or even a false data initialization by the peripheral. For more information

regarding the power up glitch performance of the AXC family of level translators, see the Glitch Free Power

Sequencing With AXC Level Translators application report

8.3.7 Negative Clamping Diodes

The inputs and outputs to this device have negative clamping diodes as depicted in Figure 9.

CAUTION

Voltages beyond the values specified in the Absolute Maximum Ratings table can

cause damage to the device. The input negative-voltage and output voltage ratings

may be exceeded if the input and output clamp-current ratings are observed.

Figure 9. Electrical Placement of Clamping Diodes for Each Input and Output

8.3.8 Fully Configurable Dual-Rail Design

translating between any of the voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V and 3.3 V).

8.3.9 Supports High-Speed Translation

The SN74AXC4T774 device can support high data-rate applications. The translated signal data rate can be up to

310 Mbps when the signal is translated from 1.8 V to 3.3 V.

8.4 Device Functional Modes

(1)

Input circuits of the data I/Os are always active.

(2)

Pins configured as inputs should not be left floating.

Table 2. Function Table

CONTROL INPUTS

Port Status

OPERATION

OE

DIR

A PORT

B PORT

L

L

Output (Enabled)

Input (Hi-Z)

B data to A bus

L

H

Input (Hi-Z)

Output (Enabled)

A data to B bus

H

X

Input (Hi-Z)

Input (Hi-Z)

Isolation