AX88655AB datasheet(9/33 Pages) ASIX

9 / 33 page

ASIX ELECTRONICS CORPORATION

AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch

CONFIDENTIAL

TXD4[7:0]

C6, B6, A6,

C7, B7, A7,

B8, A8

Transmit Data: Please references section 2.1.1.

TX_CLK4

I/PD

MII Transmit Clock Input: Please references section 2.1.1.

COL4

I/PD

Collision Detect: Please references section 2.1.1.

CRS4

I/PD

Carrier Sense: Please references section 2.1.1.

RX_DV4

Receive Data Valid: Please references section 2.1.1.

RX_CLK4

Receive Clock Input: Please references section 2.1.1.

RXD4[7:0]

I/PD

A2, B3, A3,

C4, B4, A4,

D5, C5

Receive Data: Please references section 2.1.1.

2.2 Miscellaneous

Signal Name

I/O

Pin No.

Description

L1, L2, L3,

M2, M3, M4,

N1, N2, N3,

P1, P2, P3,

R1,R2, R3,

R4 ,T3, T4, F4,

F3, G2, E1,

H3,G3, C3,

G1,Y9,V8,

W8, Y8,

V7, W7, Y7,

V6, W6,

Y6,U11,V12,U

12,W11,V11,

Y11, U10, V10

W10, Y10

U9, V9,

W9,Y15,U14,

V14, W14,

Y14, V13,

W13,Y13,

W12,

Y12,W18,Y19,

W19,V17,Y18,

W17, Y17,

U16, V16,

W16, Y16,

V15,

W15,T20,U17,

U18, U19,

U20, V18,

V19, V20,

W20,

Y20,P17,N20,

N19,P19,P18,

P20, R17, R18,

R19, R20, T17,

T18, T19

E_8051_EN

Pull low, using external 8051, NC or Pull hi, using internal 8051

USE_83M

System clock enable,0:use SYSCLK, 1:90M generate by PLL

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