ADF5902 datasheet(35/39 Pages) AD

35 / 39 page

Data Sheet

ADF5902

Rev. 0 | Page 35 of 39

Frequency Deviation

The frequency deviation for each frequency hop is set by

fDEV = (fPFD/225) × (DEV × 2DEV_OFFSET)

(7)

where:

fPFD is the PFD frequency.

DEV is a 16-bit word (Bits[DB20:DB5] in Register R14).

DEV_OFFSET is a 4-bit word (Bits[DB24:DB21] in Register R14).

Time per step

The time between each frequency hop is set by

Timer = CLK1 × CLK2 × (1/fPFD)

(8)

where:

CLK1 and CLK2 are the 12-bit clock values (12-bit CLK1 divider in

Bits[DB20:DB19] in Register R13 must be set to 11 for ramp

divider.

fPFD is the PFD frequency.

Either CLK1 or CLK2 must be greater than 1, that is, CLK1 =

CLK2 = 1 is not allowed.

Number of Steps

A 20-bit step value (Bits[DB24:DB5] in Register R15) defines

the number of frequency hops that take place. The INT value

cannot be incremented by more than 28 = 256 from its starting

value.

RAMP AND MODULATION

All ramps are generated according to the scheme shown in

Figure 49. The total ramp is separated into four sections. Each

section consists of a delay section and a slope section. Each

slope is made up of one or more steps. Each step has a

programmed frequency deviation and step time.

There are numerous ramp shapes available (see the Waveform

Generation section). Depending on the chosen shape, some or

all of the ramp slopes must be programmed. Figure 49 shows

what must be programmed for each shape. The slope being

programmed is controlled by



CLK DIV SEL (Register R13, Bits[DB6:DB5]).



DEV SEL (Register R14, Bits[DB26:DB25]).



Step SEL (Register R15, Bits[DB26:DB25]).

Typically, each register must be written multiple times, one time

for each slope.

The frequency deviation for each step of a slope is set by

fDEV = (fPFD/225) × (DEV × 2DEV_OFFSET)

where:

fDEV is the frequency deviation of a step.

fPFD is the PFD frequency.

DEV is the deviation value (Register R14, Bits[DB20:DB5]).

DEV_OFFSET is the deviation offset (Register R14,

Bits[DB24:DB21]).

The time for each step of a slope is set by

Timer = CLK1 × CLK2 × (1/fPFD)

where:

Timer is the time per step.

CLK1 is the CLK1 value (Register R7, Bits[23:12]).

CLK2 is the CLK2 value (Register R13, Bits[18:7]).

CLK1 is common to all slopes.

The number of steps per slope is programmed in Register R15,

Bits[DB24:DB5].

When programming the registers for a ramp, write the registers

in descending order. Then write to Register R5 to enable the

ramp (Register R5, Bit DB29 = 1) must be last.

ADF5902 bảng dữ liệu(PDF) 35 Page - Analog Devices

ADF5902 bảng dữ liệu(HTML) 35 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

bảng dữ liệu tải về

Link URL