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GD25VE40C bảng dữ liệu(PDF) 42 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25VE40C bảng dữ liệu(HTML) 42 Page - GigaDevice Semiconductor (Beijing) Inc. |
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42 / 55 page ![]() Uniform Sector Dual and Quad Serial Flash GD25VE40C 42 8. ELECTRICAL CHARACTERISTICS 8.1. POWER-ON TIMING Figure 37. Power-on Timing Sequence Diagram Table6. Power-Up Timing and Write Inhibit Threshold Symbol Parameter Min. Max. Unit tVSL VCC (min.) to device operation 5 ms VWI Write Inhibit Voltage 1.5 2.1 V VPWD VCC voltage needed to below VPWD for ensuring initialization will occur 0.5 V tPWD The minimum duration for ensuring initialization will occur 300 us 8.2. INITIAL DELIVERY STATE The device is delivered with the memory array erased: all bits are set to 1(each byte contains FFH).The Status Register contains 00H (all Status Register bits are 0). 8.3. ABSOLUTE MAXIMUM RATINGS Parameter Value Unit Ambient Operating Temperature -40 to 85 ℃ Storage Temperature -65 to 150 ℃ Applied Input/Output Voltage -0.6 to VCC+0.4 V Transient Input/Output Voltage (note: overshoot) -2.0 to VCC+2.0 V VCC -0.6 to 4.2 V VCC(max.) VCC(min.) tVSL Chip Selection is not allowed Full Device Access Allowed Time VPWD(max.) tPWD VCC |
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