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CY2287
9
Switching Waveforms (continued)
CPU 100 MHz
SDRAM 100 MHz
3V66 66 MHz
0 ns
10 ns
20 ns
30 ns
40 ns
SDRAM to 3V66 Skew, SDRAM leads 3V66 by 0.0 ns (500-ps window)
t5
CLK-CLK Output Skew (CPU @ 100 MHz)
CPU 100 MHz
SDRAM 100 MHz
3V66 66 MHz
0 ns
10 ns
20 ns
30 ns
40 ns
CPU to 3V66 Skew, CPU leads 3V66 by 0.0 ns (500-ps window)
CLK-CLK Output Skew (CPU @ 100 MHz)
t6_100
CPU 100 MHz
SDRAM 100 MHz
0 ns
10 ns
20 ns
30 ns
40 ns
CPU to SRAM Skew, CPU leads SDRAM by 5.0 ns (500-ps window)
3V66 66 MHz
t7_100
CLK-CLK Output Skew (CPU @ 100 MHz)
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